AXIe and AdvancedTCA Interoperability

By Steve Narciso and Greg Hill, Agilent Technologies

Questions have been posed about interoperability between AXIe (ATCA eXtensions for Instrumentation) and AdvancedTCA (ATCA) products. A simple way to approach the issue would be to consider two cases: 1) Using AXIe instruments in AdvancedTCA systems and 2) Using AdvancedTCA node boards in AXIe systems. 

Using AXIe Instruments in ATCA Systems

AXIe modules provide communications on either LAN or PCIe fabrics within an AXIe system. LAN-based AXIe modules all use Base Interface Channel 1 and will communicate on it in AdvancedTCA systems without modification.

PCIe-based AXIe modules will communicate, provided a PCIe hub is installed and a PCIe reference clock is provided on CLK3B. AXIe defines a System Module which would provide the required PCIe hub when installed in an AdvancedTCA chassis.

AXIe redefines some of the original AdvancedTCA and relatively infrequently-used Zone 2 interfaces (Synchronization Clock Interface, Update Channels, and  FC14-15). The new signals (Local Bus and Sync/Triggering) are protected by E-keying to be properly allocated and to not interfere functionally with AdvancedTCA node boards.

Two areas of caution exist. First, AXIe modules expect frame power rails between -45V and -53V—these voltages lie within the AdvancedTCA-specified range and should not be an onerous requirements for a chassis powered by most commercial off-the-shelf AC-to-DC power converters. Second, for full functionality, AXIe Instrument capabilities may be limited by lack of AXIe-specific resources such as backplane trigger and local bus routing.

Using AdvancedTCA Node Boards in AXIe Systems

Since AXIe systems include a Base 0 Interface and Hub (hub is included in the AXIe System Module), an AdvancedTCA node board will communicate on Base 1 in AXIe systems.

As discussed above, AXIe redefines some of the original AdvancedTCA and relatively infrequently-used Zone 2 interfaces (Synchronization Clock Interface, Update Channels, and FC14-15).  The new signals (Local Bus and Sync/Triggering) are protected by E-keying to be properly allocated and to not interfere functionally with AdvancedTCA node boards.

AXIe 3.1, aimed at semiconductor test, defines a specific Zone 3 backplane along with RTMs that route signals to the device under test. AXIe 1.0 has defined front panel I/O only, with no defined RTM or Zone 3 backplane, unless it also supports AXIe 3.1. While not prohibited, the Zone 3 Rear Transition Module (RTM)connection is not specified and may not be supported in an AXIe 1.0 chassis.

Finally, AdvancedTCA Node capabilities may be limited by lack of Synchronization Clock and Update Channel interface connections.  These are not available in AXIe systems.

We estimate that about 80% of AdvancedTCA computer blades will operate without modification in an AXIe system.

Steve Narciso is Co-chair of the AXIe Consortium Technical Committee and R&D Project Manager at Agilent Technologies, and Greg Hill is a Principal Scientist at Agilent Technologies. You can reach them at steve_narciso@agilent.com and greg_hill@agilent.com, respectively.